With an increase in the density of large scale integrated circuits (hereinafter, referred to as an LSI), circuit patterns are being miniaturized.
In order to integrate a large number of semiconductor devices into a small area, the semiconductor devices must be formed to be small in size. To this end, widths and spaces of patterns to be formed should be made small.
With the current trend of miniaturization, microstructure embedding, particularly, oxide embedding a narrow void structure (groove) which is deep in a vertical direction or narrow in a width direction has reached its technical limits when the embedding of the oxide is performed by a CVD method. In addition, with the miniaturization of transistors, a thin and uniform gate insulating film or gate electrode is required to be formed. Further, it is required to reduce the processing time per substrate in order to improve productivity of semiconductor devices.
Further, in order to increase the productivity of semiconductor devices, it is required to improve the processing uniformity for the entire surface a substrate.